For higher integration and higher capacity of a nonvolatile semiconductor memory device, it is necessary to reduce design rules. In order to reduce the design rules, enhanced micro fabrication of wiring patterns or the like is needed. This, however, requires an extremely high level of fabrication technique, so that the reduction of the design rules has become increasingly difficult.
Accordingly, nonvolatile semiconductor memory devices having three-dimensional structures have recently been suggested for higher integration of memory cells.
A common feature of these nonvolatile semiconductor memory devices is that a fin type stacked layer structure is obtained by a semiconductor substrate and memory strings. The memory strings are stacked in a first direction perpendicular to the surface of the semiconductor substrate, and extend in a second direction parallel to the surface of the semiconductor substrate. The memory strings comprise memory cells connected in series in the second direction. One end of the fin type stacked layer structure in the second direction is connected to a beam extending in a third direction perpendicular to the first and second directions. The beam has a function to prevent the collapse of the fin type stacked layer structure. A function of selecting one of the memory strings is added to a part of the beam.
According to such a structure, theoretically, integration can be enhanced by the increase of the number of stacked memory strings and by the reduction of the fin width (width in the third direction) of the fin type stacked layer structure.
However, when the fin type stacked layer structures are connected to one beam, an assist gate transistor for selecting one of the fin type stacked layer structures is added to each of the fin type stacked layer structures. The assist gate transistor needs to be independently operated for each of the fin type stacked layer structures. Therefore, assist gate electrodes also have to be separated from one another for the respective fin type stacked layer structures.
The assist gate electrodes are separated, for example, by photolithography and RIE. However, when the assist gate electrodes are separated from one another in the fin type stacked layer structures, the distance (space in the third direction) between the fin type stacked layer structures needs to be great enough to pattern the assist gate electrode. Accordingly, it is difficult to sufficiently reduce the distance. Thus, the integration of the nonvolatile semiconductor memory device cannot be sufficiently enhanced.